1. Field of the Invention
The present invention relates to a memory device in which a memory cell is formed using a memory element which stores information according to a state of electric resistance.
2. Description of the Related Art
In information equipment such as a computer, a high-density DRAM that performs a high-speed operation is widely used as a random access memory.
However, since the DRAM is a volatile memory in which information disappears when a power supply is shut off, there has been a demand for a nonvolatile memory in which information does not disappear.
Further, as the nonvolatile memory which is assumed to be promising in the future, there have been proposed an FeRAM (ferroelectric memory), an MRAM (magnetic memory), a phase change memory and a resistance change type memory such as a PMC (Programmable Metallization Cell) or an RRAM.
In case of those memories, it becomes possible to retain written information for a long period of time even if there is no power supply.
Further, in case of those memories, a refreshing operation is unnecessary by making them nonvolatile, so that power consumption can be reduced to that extent.
However, in the case of FeRAM, currently it is difficult to perform a nondestructive readout, and since a destructive readout is performed, a reading speed is slow. Moreover, since a restriction exists with respect to the number of times in polarization reversal by the readout or the recording, there is a limitation in the rewritable number of times.
In the case of MRAM, since recording requires a magnetic field, the magnetic field is generated by electric current flowing in wiring. For this reason, a large amount of electric current is required when the recording is performed.
A phase change memory is a memory which performs the recording by applying a voltage pulse having the same polarity and different magnitude.
Since the phase change memory generates switching in accordance with a temperature, there remains a problem of being sensitive to a change of environmental temperature.
In the resistance change type nonvolatile memory such as PMC or RRAM, a material having a characteristic that a resistance value changes by applying a voltage or current is used for a memory layer in which information is stored.
Therefore, since a relatively simple structure is employed in which two electrodes are provided with the memory layer in between and a voltage or current is applied to those two electrodes, a memory element can easily be miniaturized.
PMC has a structure in which an ionic conductor containing a certain metal is interposed between two electrodes, and one of those two electrodes is made to contain the metal which is contained in the ionic conductor, thereby using a characteristic in which an electrical property such as a resistance or capacitance of the ionic conductor changes when the voltage is applied between the two electrodes (for example, refer to patent reference 1).
Specifically, an ionic conductor is composed of a solid solution made of chalcogenide and a metal (for example, amorphous GeS or amorphous GeSe), and one of the two electrodes contains Ag, Cu or Zn (refer to the patent reference 1).
In addition, since a crystallization temperature of amorphous GeS or amorphous GeSe is approximately 200 degrees Celsius in the PMC and the characteristic becomes deteriorated when the ionic conductor is crystallized, there is a problem that PMC can not endure a high temperature in a process of actually producing the memory element, which is a process of forming a CVD insulation film or a protection film or the like, for example.
As a structure of RRAM, there has been introduced the one in which polycrystal PrCaMnO3 thin film, for example, is interposed between two electrodes and a resistance value of PrCaMnO3 which is the recording film is greatly changed by applying a voltage pulse or a current pulse to the two electrodes (refer to non-patent reference 1).
Further, a voltage pulse having a different polarity is applied at the time of recording (writing) information and at the time of erasing information.
Moreover, as another structure of the RRAM, there has been introduced the structure in which SrZrO3 having Cr slightly doped (of either a monocrystal or polycrystal), for example, is interposed between two electrodes and a resistance value of the recording film is changed by the current flowing from those electrodes (refer to non-patent reference 2).
I-V characteristic of memory layer is shown in the non-patent reference 2, and a threshold voltage when recording and erasing is set to ±0.5 volt. Even in this structure, recording and erasure of information can be performed by applying a voltage pulse, and the required pulse voltage is assumed to be ±1.1 volts and the width thereof is 2 ms.
Further, high speed recording and erasing can be performed, and an operation at the voltage pulse width of 100 ns is reported. In this case, the required pulse voltage is ±5 volts.
However, since each material of the memory layer which is proposed in the structure of above mentioned RRAM is a crystalline material, there occur such problems as: heat treatment of approximately 600 degrees Celsius is required, it is very difficult to manufacture the monocrystal of proposed materials, the miniaturization becomes difficult due to the reason that there is an influence of grain boundary when the polycrystal is used, and so forth.
[Patent reference 1] Japanese Translation of PCT International Application No. 2002-536840
[Non-patent reference 1] “Novel Colossal Magneto resistive Thin Film Nonvolatile Resistance Random Access memory (RRAM)” written by W. W. Zhuang et al. in Technical Digest “International Electron Device Meeting” of 2002, page. 193
[Non-patent reference 2] “Reproducible switching effect in thin oxide films for memory applications” written by A. Beck et al. in Applied Physics Letters of 2000, vol. 77, pages. 139–141
Further, in the above mentioned RRAM, it is proposed to perform the recording or erasure of information by applying a pulse voltage; however, in the proposed structure, the resistance value of the memory layer after recording changes depending on the pulse width of the applied pulse voltage.
Moreover, the fact that the resistance value after recording is thus dependent on the pulse width of the recording indicates indirectly that the resistance value will also change when the same pulse is repeatedly applied.
For example, in the above mentioned non-patent reference 1 it is reported that the resistance value after recording changes greatly depending on the pulse width when the pulse having the same polarity is applied. That shows a characteristic in which in the case where the pulse width is 50 ns or shorter, a rate of resistance change due to the recording becomes small; and in the case where the pulse width is 100 ns or longer, the resistance value does not saturate to a constant value but conversely, the longer the pulse width becomes, the closer it comes to the resistance value before recording.
Moreover, a characteristic of memory structure having the memory layer and a MOS transistor for access control connected in series to be disposed in an array-form is introduced in the non-patent reference 1, and it is reported that the resistance value of the memory layer after recording changes depending on the pulse width when the pulse width is changed in the range from 10 ns to 100 ns. When the pulse width is made further longer, it is presumed from the characteristic of the memory layer that the resistance decreases again.
In other words, since the resistance value after recording is dependent on the magnitude and the pulse width of pulse voltage in the case of RRAM, there occurs a dispersion in the resistance value after recording when there is a dispersion in the magnitude and the pulse width of a pulse voltage.
Accordingly, when the pulse voltage is shorter than approximately 100 ns, the rate of resistance change due to the recording is small and it becomes susceptible to the dispersion in the resistance value after recording, and therefore it is difficult to perform the recording stably.
Then, when the recording is performed with such short pulse voltage, a process of confirming (verifying) contents of information needs to be performed after recording in order to perform the recording without fail.
For example, a process of reading and confirming the contents of information (the resistance value of the memory layer) which have been already recorded in the memory element is carried out before performing the recording, and the recording is to be performed correspondingly to a relation between the confirmed contents (resistance value) and the contents to be recorded from now on (resistance value).
As an alternative, a process of reading and confirming the contents of information which are recorded in the memory element is carried out after performing the recording, for example, and when there exists a difference from a desired resistance value, re-recording is performed to obtain a desired resistance value corrected.
Accordingly, the period of time required for recording becomes long, and it becomes difficult to perform overwriting of data or the like at a high speed, for example.
In order to solve the above mentioned problems, the present invention is to provide a memory device in which recording can be performed stably and the time required for recording information can be shortened.